PLD circuit
Final Project Conclusions
with a lot of troubleshooting I was able to create this 60 second counter with a combination of synchronous JK flip flops, logic, and a 74LS163 counter IC. The 74LS163 is a up counter that resets to the number you set it to, unlike the 74LS193 that can count up, down and resets at the number before, that you choose.
How this circuit works...
The LSD (least significant digit) is controlled by a 74LS163 counter IC, which is supplied by a 1Hz square wave voltage frequency at CLK. This counter then counts up in binary from 0. when it hits 9 the NAND gate's output changes to 0 resetting the count to 0 after the 9 has been displayed for a second. when the NAND gate is toggled to 0 and back to 1, this acts as a clock to the set of JK flip flops, controlling the MSD (Most Significant Digit). The synchronous combination of JK flip flops increase the MSD by one ever time the LSD resets. Once the MSD hits 6 the count resets to 0 and counts up from 0. The reset button at pin 15 resets the count when pressed by sending a pulse to both resets of the LSD and MSD counters. The binary made by both counters are converted to digital by two 74LS78. This enables the data to be read by the 7 segment displays. they then give the information to the multiplexers so the 2 displays blink interchangeable with one another thus saving power.
My circuit was unique from other circuits made by my classmates because I had more logic then them and I was probably the only one to use a XOR gate in my circuit. This circuit was the hardest one to make so far because of all the components and random problems that technology usually gives me, In which the only reason you can think of for why is "TECHNOLGY!".
How this circuit works...
The LSD (least significant digit) is controlled by a 74LS163 counter IC, which is supplied by a 1Hz square wave voltage frequency at CLK. This counter then counts up in binary from 0. when it hits 9 the NAND gate's output changes to 0 resetting the count to 0 after the 9 has been displayed for a second. when the NAND gate is toggled to 0 and back to 1, this acts as a clock to the set of JK flip flops, controlling the MSD (Most Significant Digit). The synchronous combination of JK flip flops increase the MSD by one ever time the LSD resets. Once the MSD hits 6 the count resets to 0 and counts up from 0. The reset button at pin 15 resets the count when pressed by sending a pulse to both resets of the LSD and MSD counters. The binary made by both counters are converted to digital by two 74LS78. This enables the data to be read by the 7 segment displays. they then give the information to the multiplexers so the 2 displays blink interchangeable with one another thus saving power.
My circuit was unique from other circuits made by my classmates because I had more logic then them and I was probably the only one to use a XOR gate in my circuit. This circuit was the hardest one to make so far because of all the components and random problems that technology usually gives me, In which the only reason you can think of for why is "TECHNOLGY!".